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[directfb-dev] Possible solution for CRTC2 tearing
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[directfb-dev] Possible solution for CRTC2 tearing



It appears my brain is in need of a rebuild...

I think the tearing comes from writing some of the registers before the
hardware flips them and some after. So you can get one field from the new
image and one from the old or in planar mode some weird combination where
some chroma data is from the wrong image.

I've attached a patch that will hopefully fix this. If the current line is
too close to the beginning of vblank the driver will wait a bit before
programming the registers.

I'm not sure how long the mmio programming will take and I'm not sure
where exactly the hardware flips the registers so I just use picked some
line count which seems to work. Any ideas for a safe value?

For now I didn't use the IRQ for the waiting. Anyone know if it's worth
using it for such a small amount of lines?

-- 
Ville Syrjälä
syrjala@sci.fi
http://www.sci.fi/~syrjala/
Index: gfxdrivers/matrox/matrox_crtc2.c
===================================================================
RCS file: /cvs/directfb/DirectFB/gfxdrivers/matrox/matrox_crtc2.c,v
retrieving revision 1.5
diff -u -r1.5 matrox_crtc2.c
--- gfxdrivers/matrox/matrox_crtc2.c	18 Nov 2002 18:42:43 -0000	1.5
+++ gfxdrivers/matrox/matrox_crtc2.c	4 Dec 2002 01:11:07 -0000
@@ -273,8 +273,8 @@
 
      crtc2OnOff( mdrv, mcrtc2, 0 );
      crtc2_set_regs( mdrv, mcrtc2 );
-     crtc2_set_buffer( mdrv, mcrtc2, layer );
      crtc2OnOff( mdrv, mcrtc2, 1 );
+     crtc2_set_buffer( mdrv, mcrtc2, layer );
      maven_program( &mcrtc2->md, &mcrtc2->mr );
      if (config->options & DLOP_FLICKER_FILTERING)
           maven_set_deflicker( &mcrtc2->md, 2 );
@@ -586,6 +586,8 @@
      CoreSurface   *surface      = dfb_layer_surface( layer );
      SurfaceBuffer *front_buffer = surface->front_buffer;
      volatile __u8 *mmio         = mdrv->mmio_base;
+     int            vdisplay     = (dfb_config->matrox_ntsc ? 486/2 : 576/2) + 2;
+     int            line;
 
      /* interleaved fields */
      mcrtc2->regs.c2OFFSET = front_buffer->video.pitch * 2;
@@ -611,6 +613,11 @@
           default:
                break;
      }
+
+     line = mga_in32( mmio, C2VCOUNT ) & 0x00000FFF;
+     if (line + 6 > vdisplay && line < vdisplay)
+          while ((mga_in32( mmio, C2VCOUNT ) & 0x00000FFF) != vdisplay)
+               ;
 
      mga_out32( mmio, mcrtc2->regs.c2OFFSET, C2OFFSET );
      mga_out32( mmio, mcrtc2->regs.c2STARTADD1, C2STARTADD1 );

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